Technological advances in wireless and wireline data communications have resulted in communications systems and integrated circuits that operate at very high RF, microwave and millimetre-wave frequencies. At these high frequencies the physical effects of metal interconnections between functional components play a major role in the electronic circuit performance. Accurate prediction of the circuit performance before fabrication, by means of electronic design automation (EDA) tools, has become essential for shortening design cycles and lowering engineering cost. Incorporating real-world physical effects in the early stages of the electronic design process is essential for achieving design success with very few design iterations. Yet design approaches in common use do not perform parasitic analysis and physical verification until after attaining the basic prescribed electrical design specifications. As a result, designers focus on getting their electrical designs to work in isolation from physical world effects. This division between electrical and physical design requires designers to exert much extra effort, going back and forth between schematic and layout design in search of the ultimate goal of meeting design specifications under real-world conditions.
In a typical high-frequency design procedure, several RF and microwave engineers work separately on different parts of an overall design, using the particular expertise of each contributing engineer. Although there are many benefits to this approach, it also introduces some challenges, especially between design implementation in the circuit domain (schematic) and physical domain (layout). Physical design parasitic effects must be incorporated in all high frequency design simulations. However, most engineers tend to stay close to the area of knowledge they know well (i.e. schematic circuits), and leave physical design verification to someone else, to be performed later in the design cycle. This delay in including key parasitic effects in the design process causes design flow bottlenecks, and often, redesign of the original circuit.
Some design groups tackle these issues by using various specific tools at certain design stages to provide them with an insight into the progress of their design efforts. One of those tools is electromagnetic simulation. Over the past decade, electromagnetic (EM) simulators have been widely applied for the verification of layout interconnections and passive components in RF and microwave circuit applications. Although EM simulators are very successful in providing accurate models for real-life physical effects, their adoption in the electronic design process has been hampered by some significant restrictions, the most important ones being the limited integration in the design framework, their limited performance in relation to the computer resources they require, and high level of expertise required for their effective use.
A major bottleneck in high-frequency design is the time spent transferring design data between independent design tools for EM analysis and verification. The typical process is to first assess the challenging areas of a design that would require further detailed analysis using an EM simulator. In most cases, each such area is captured manually into the EM tool, either by setting it up as a sub-network and exporting it to the EM tool, or manually regenerating the geometry in the EM tool itself. In another step, the EM generated results are manually back-annotated to the original circuit design via black-box representations, a process that is time consuming and cumbersome. This complicates design analysis, especially when several variations of the physical design effects are under study.
In general, most design bottlenecks occur when transferring the design between the schematic (for circuit performance analysis) and layout (for physical design modelling and verification) to obtain a successful integration of physical parasitics at the schematic level. Another problem is the prerequisite that the designer using the EM tool must have some understanding of the underlying modelling technology in order to be successful. EM tools require a level of modelling expertise that goes beyond classical circuit design. This EM expertise is not shared by all designers, creating the need for EM modelling experts within design groups. The level of expertise also dictates the efficiency of the process: the less experience a designer has in EM modelling, the longer it takes to perform and incorporate successful and accurate EM simulations in the design process.
When designing RF, microwave and millimetre-wave circuits, it is generally accepted that optimization using reasonable amounts of CPU-time should be based on circuit-oriented simulators. These simulators use the description of a circuit in terms of lumped elements and (coupled) transmission lines to account for distributed effects and/or directly rely on an S-parameter (or equivalently Y- or Z-parameter) description of the different parts of the circuit. The circuit simulator approach relies on subdividing the circuit into separate parts for each of which models exist or can be calculated (either (semi)-analytically or using a dedicated CAD-tool). Kirchoff's current and/or voltage laws are then applied to obtain the overall circuit equations and solutions. This approach is fast and therefore easily integrated with advanced optimization techniques. However, the partitioning and the circuit description do not always properly account for actual field effects and couplings that occur in the real-world circuit. To properly design microwave, RF and high-speed digital circuits it is necessary to take account of physical effects of the actual layout. It might seem preferable therefore to rely more heavily on electromagnetic simulators for circuit design and optimization purposes. However, although in the past decade much progress has been seen in the development of efficient field simulators, accompanied by a very large increase in computer speed and memory, field simulators remain slower relative to circuit simulators. This lack of speed is especially problematic for activities such as optimization, tuning and yield analysis that require a very large number of circuit evaluations. Secondly, EM simulators are best suited for the passive linear part of the circuit, and it is much more difficult to include active and non-linear elements which are more easily incorporated in circuit simulation.
Various commercial circuit design EDA environments offer EM/circuit co-simulation and co-optimization capabilities based on direct EM simulation technology. In this case the EM simulator is simply part of a classical circuit simulation or optimization loop and is directly driven by the circuit simulator. However, the speed of the simulation and optimization process critically depends upon the number of data samples to be evaluated and the time needed to solve the EM problem for each selected sample, and this can quickly become problematic. This makes existing solutions for EM/circuit co-optimization impractical for real-world electronic design work. For example, one supplier of such systems has stated “[the system] could have been configured to optimize using EM runs on each optimization step. While conceptually attractive, the long time required to optimize EM-nonlinear co-simulation is not practical for real-world design” (“The 2001 MEE CAD benchmark: Rat-Race Mixer Characterization”, Microwave Engineering Europe, October 2001).